In the design of a power source for a printed circuit board (PCB), simulation is executed to confirm whether or not a sufficient voltage is supplied to an integrated circuit (IC). In the simulation, a conductive body of the PCB is divided into meshes, voltages to be supplied to the meshes are calculated, and a voltage distribution between the power source and the IC is calculated. Whether or not a problem with the voltage to be supplied exists is confirmed in advance. If the voltage to be supplied to the IC is lower than a voltage stated in specifications of the IC, measures are taken for a portion of which a voltage drop is large.
In order to calculate voltage drops of portions of the PCB, differences in potential between adjacent meshes are calculated and portions between which the difference in potential is large is presented based on the calculated values.
In the simulation, if the whole PCB is divided into small meshes, a time period for analysis and the amount of a memory to be used increase. Thus, there is a technique for reducing the time period for the analysis and the amount of the memory to be used by using non-uniform meshes obtained by reducing the sizes of only meshes to be used.
A power source noise model generating device that models a power layer using non-uniform meshes is known (refer to, for example, Japanese Laid-open Patent Publication No. 2004-334654).
Other examples of related art are Japanese Laid-open Patent Publications Nos. 2012-53651 and 2001-237412.